What is true about the process of converting analog data into digital data?

Since the computers are the heart of all data processing, we must convert our analog signals to numbers. The process of converting a continuous analog signal to a series of numbers representing the signal at discrete intervals is called analog to digital conversion and is performed with analog to digital converters [ADC]. Figure 4.1 shows a signal, where the amplitude is measured at regular intervals δt. In its simplest form, we could simply envisage measuring the amplitude of a slowly changing signal with an analog voltmeter and write down the numbers. Alternatively, if we have an analog plotted signal like in Figure 4.1, we just measure the amplitudes with a ruler and enter the numbers into a computer. In principle, this way of getting digital data is used when older paper seismograms are digitized manually, except that the process is automated by using a digitizing table, which automatically reads the position of a cursor on a table. The process of analog-digital conversion involves two steps: First the signal is sampled at discrete time intervals, then each sample is evaluated in terms of a number [usually integer, but in any case with finite resolution] and output in form of a code.

Keywords

  • Quantization Error
  • Reference Voltage
  • High Dynamic Range
  • Corner Frequency
  • Digital Converter

These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Authors and Affiliations

  1. University of Bergen, Norway

    Jens Havskov

  2. University of Granada, Spain

    Gerardo Alguacil

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  1. Jens Havskov

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  2. Gerardo Alguacil

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  1. University of Bergen, Norway

    Jens Havskov

  2. University of Granada, Spain

    Gerardo Alguacil

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© 2004 Springer-Verlag Berlin Heidelberg

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Havskov, J., Alguacil, G. [2004]. Analog to digital converter. In: Havskov, J., Alguacil, G. [eds] Instrumentation in Earthquake Seismology. Modern Approaches in Geophysics, vol 22. Springer, Dordrecht. //doi.org/10.1007/978-1-4020-2969-1_4

In electronics, an analog-to-digital converter [ADC, A/D, or A-to-D] is a system that converts an analog signal, such as a sound picked up by a microphone or light entering a digital camera, into a digital signal. An ADC may also provide an isolated measurement such as an electronic device that converts an analog input voltage or current to a digital number representing the magnitude of the voltage or current. Typically the digital output is a two's complement binary number that is proportional to the input, but there are other possibilities.

There are several ADC architectures. Due to the complexity and the need for precisely matched components, all but the most specialized ADCs are implemented as integrated circuits [ICs]. These typically take the form of metal–oxide–semiconductor [MOS] mixed-signal integrated circuit chips that integrate both analog and digital circuits.

A digital-to-analog converter [DAC] performs the reverse function; it converts a digital signal into an analog signal.

Explanation[edit]

An ADC converts a continuous-time and continuous-amplitude analog signal to a discrete-time and discrete-amplitude digital signal. The conversion involves quantization of the input, so it necessarily introduces a small amount of error or noise. Furthermore, instead of continuously performing the conversion, an ADC does the conversion periodically, sampling the input, limiting the allowable bandwidth of the input signal.

The performance of an ADC is primarily characterized by its bandwidth and signal-to-noise ratio [SNR]. The bandwidth of an ADC is characterized primarily by its sampling rate. The SNR of an ADC is influenced by many factors, including the resolution, linearity and accuracy [how well the quantization levels match the true analog signal], aliasing and jitter. The SNR of an ADC is often summarized in terms of its effective number of bits [ENOB], the number of bits of each measure it returns that are on average not noise. An ideal ADC has an ENOB equal to its resolution. ADCs are chosen to match the bandwidth and required SNR of the signal to be digitized. If an ADC operates at a sampling rate greater than twice the bandwidth of the signal, then per the Nyquist–Shannon sampling theorem, perfect reconstruction is possible. The presence of quantization error limits the SNR of even an ideal ADC. However, if the SNR of the ADC exceeds that of the input signal, its effects may be neglected resulting in an essentially perfect digital representation of the analog input signal.

Resolution[edit]

Fig. 1. An 8-level ADC coding scheme

The resolution of the converter indicates the number of different, ie discrete, values it can produce over the allowed range of analog input values. Thus a particular resolution determines the magnitude of the quantization error and therefore determines the maximum possible signal-to-noise ratio for an ideal ADC without the use of oversampling. The input samples are usually stored electronically in binary form within the ADC, so the resolution is usually expressed as the audio bit depth. In consequence, the number of discrete values available is usually a power of two. For example, an ADC with a resolution of 8 bits can encode an analog input to one in 256 different levels [28 = 256]. The values can represent the ranges from 0 to 255 [i.e. as unsigned integers] or from −128 to 127 [i.e. as signed integer], depending on the application.

Resolution can also be defined electrically, and expressed in volts. The change in voltage required to guarantee a change in the output code level is called the least significant bit [LSB] voltage. The resolution Q of the ADC is equal to the LSB voltage. The voltage resolution of an ADC is equal to its overall voltage measurement range divided by the number of intervals:

Q=EFSR2M,{\displaystyle Q={\dfrac {E_{\mathrm {FSR} }}{2^{M}}},}

where M is the ADC's resolution in bits and EFSR is the full scale voltage range [also called 'span']. EFSR is given by

EFSR=VRefHi−VRefLow,{\displaystyle E_{\mathrm {FSR} }=V_{\mathrm {RefHi} }-V_{\mathrm {RefLow} },\,}

where VRefHi and VRefLow are the upper and lower extremes, respectively, of the voltages that can be coded.

Normally, the number of voltage intervals is given by

N=2M,{\displaystyle N=2^{M},\,}

where M is the ADC's resolution in bits.

That is, one voltage interval is assigned in between two consecutive code levels.

Example:

  • Coding scheme as in figure 1
  • Full scale measurement range = 0 to 1 volt
  • ADC resolution is 3 bits: 23 = 8 quantization levels [codes]
  • ADC voltage resolution, Q = 1 V / 8 = 0.125 V.

In many cases, the useful resolution of a converter is limited by the signal-to-noise ratio [SNR] and other errors in the overall system expressed as an ENOB.

Comparison of quantizing a sinusoid to 64 levels [6 bits] and 256 levels [8 bits]. The additive noise created by 6-bit quantization is 12 dB greater than the noise created by 8-bit quantization. When the spectral distribution is flat, as in this example, the 12 dB difference manifests as a measurable difference in the noise floors.

Quantization error[edit]

Analog to digital conversion as shown with fig. 1 and fig. 2.

Quantization error is introduced by the quantization inherent in an ideal ADC. It is a rounding error between the analog input voltage to the ADC and the output digitized value. The error is nonlinear and signal-dependent. In an ideal ADC, where the quantization error is uniformly distributed between −1/2 LSB and +1/2 LSB, and the signal has a uniform distribution covering all quantization levels, the signal-to-quantization-noise ratio [SQNR] is given by

SQNR=20log10⁡[2Q]≈6.02⋅Q dB{\displaystyle \mathrm {SQNR} =20\log _{10}[2^{Q}]\approx 6.02\cdot Q\ \mathrm {dB} \,\!}

where Q is the number of quantization bits. For example, for a 16-bit ADC, the quantization error is 96.3 dB below the maximum level.

Quantization error is distributed from DC to the Nyquist frequency. Consequently, if part of the ADC's bandwidth is not used, as is the case with oversampling, some of the quantization error will occur out-of-band, effectively improving the SQNR for the bandwidth in use. In an oversampled system, noise shaping can be used to further increase SQNR by forcing more quantization error out of band.

Dither[edit]

In ADCs, performance can usually be improved using dither. This is a very small amount of random noise [e.g. white noise], which is added to the input before conversion. Its effect is to randomize the state of the LSB based on the signal. Rather than the signal simply getting cut off altogether at low levels, it extends the effective range of signals that the ADC can convert, at the expense of a slight increase in noise. Note that dither can only increase the resolution of a sampler. It cannot improve the linearity, and thus accuracy does not necessarily improve.

Quantization distortion in an audio signal of very low level with respect to the bit depth of the ADC is correlated with the signal and sounds distorted and unpleasant. With dithering, the distortion is transformed into noise. The undistorted signal may be recovered accurately by averaging over time. Dithering is also used in integrating systems such as electricity meters. Since the values are added together, the dithering produces results that are more exact than the LSB of the analog-to-digital converter.

Dither is often applied when quantizing photographic images to a fewer number of bits per pixel—the image becomes noisier but to the eye looks far more realistic than the quantized image, which otherwise becomes banded. This analogous process may help to visualize the effect of dither on an analog audio signal that is converted to digital.

Accuracy[edit]

An ADC has several sources of errors. Quantization error and [assuming the ADC is intended to be linear] non-linearity are intrinsic to any analog-to-digital conversion. These errors are measured in a unit called the least significant bit [LSB]. In the above example of an eight-bit ADC, an error of one LSB is 1/256 of the full signal range, or about 0.4%.

Nonlinearity[edit]

All ADCs suffer from nonlinearity errors caused by their physical imperfections, causing their output to deviate from a linear function [or some other function, in the case of a deliberately nonlinear ADC] of their input. These errors can sometimes be mitigated by calibration, or prevented by testing. Important parameters for linearity are integral nonlinearity and differential nonlinearity. These nonlinearities introduce distortion that can reduce the signal-to-noise ratio performance of the ADC and thus reduce its effective resolution.

When digitizing a sine wave x[t]=Asin⁡[2πf0t]{\displaystyle x[t]=A\sin {[2\pi f_{0}t]}}

, the use of a non-ideal sampling clock will result in some uncertainty in when samples are recorded. Provided that the actual sampling time uncertainty due to clock jitter is Δt{\displaystyle \Delta t}
, the error caused by this phenomenon can be estimated as Eap≤|x′[t]Δt|≤2Aπf0Δt{\displaystyle E_{ap}\leq |x'[t]\Delta t|\leq 2A\pi f_{0}\Delta t}
. This will result in additional recorded noise that will reduce the effective number of bits [ENOB] below that predicted by quantization error alone. The error is zero for DC, small at low frequencies, but significant with signals of high amplitude and high frequency. The effect of jitter on performance can be compared to quantization error: Δt

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